2020-2021 Sunseeker Telemetry and Lighting System
usci_a_uart.c
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1 //*****************************************************************************
2 //
3 // usci_a_uart.c - Driver for the usci_a_uart Module.
4 //
5 //*****************************************************************************
6 
7 //*****************************************************************************
8 //
11 //
12 //*****************************************************************************
13 
14 #include "inc/hw_memmap.h"
15 
16 #ifdef __MSP430_HAS_USCI_Ax__
17 #include "usci_a_uart.h"
18 
19 #include <assert.h>
20 
21 bool USCI_A_UART_init(uint16_t baseAddress, USCI_A_UART_initParam *param)
22 {
23  bool retVal = STATUS_SUCCESS;
24 
25  //Disable the USCI Module
26  HWREG8(baseAddress + OFS_UCAxCTL1) |= UCSWRST;
27 
28  //Clock source select
29  HWREG8(baseAddress + OFS_UCAxCTL1) &= ~UCSSEL_3;
30  HWREG8(baseAddress + OFS_UCAxCTL1) |= param->selectClockSource;
31 
32  //MSB, LSB select
33  HWREG8(baseAddress + OFS_UCAxCTL0) &= ~UCMSB;
34  HWREG8(baseAddress + OFS_UCAxCTL0) |= param->msborLsbFirst;
35 
36 
37  //UCSPB = 0(1 stop bit) OR 1(2 stop bits)
38  HWREG8(baseAddress + OFS_UCAxCTL0) &= ~UCSPB;
39  HWREG8(baseAddress + OFS_UCAxCTL0) |= param->numberofStopBits;
40 
41 
42  //Parity
43  switch (param->parity){
44  case USCI_A_UART_NO_PARITY:
45  //No Parity
46  HWREG8(baseAddress + OFS_UCAxCTL0) &= ~UCPEN;
47  break;
48  case USCI_A_UART_ODD_PARITY:
49  //Odd Parity
50  HWREG8(baseAddress + OFS_UCAxCTL0) |= UCPEN;
51  HWREG8(baseAddress + OFS_UCAxCTL0) &= ~UCPAR;
52  break;
53  case USCI_A_UART_EVEN_PARITY:
54  //Even Parity
55  HWREG8(baseAddress + OFS_UCAxCTL0) |= UCPEN;
56  HWREG8(baseAddress + OFS_UCAxCTL0) |= UCPAR;
57  break;
58  }
59 
60  //Modulation Control Registers
61  HWREG16(baseAddress + OFS_UCAxBRW ) = param->clockPrescalar;
62  HWREG8(baseAddress + OFS_UCAxMCTL) = ((param->firstModReg<<4) +
63  (param->secondModReg <<1) +
64  param->overSampling );
65 
66  //Asynchronous mode & 8 bit character select & clear mode
67  HWREG8(baseAddress + OFS_UCAxCTL0) &= ~(UCSYNC +
68  UC7BIT +
69  UCMODE_3
70  );
71 
72  //Configure UART mode.
73  HWREG8(baseAddress + OFS_UCAxCTL0) |= param->uartMode ;
74 
75  //Reset UCRXIE, UCBRKIE, UCDORM, UCTXADDR, UCTXBRK
76  HWREG8(baseAddress + OFS_UCAxCTL1) &= ~(UCRXEIE + UCBRKIE + UCDORM +
77  UCTXADDR + UCTXBRK
78  );
79  return (retVal) ;
80 }
81 void USCI_A_UART_transmitData ( uint16_t baseAddress,
82  uint8_t transmitData
83  )
84 {
85  //If interrupts are not used, poll for flags
86  if (!(HWREG8(baseAddress + OFS_UCAxIE) & UCTXIE)){
87  //Poll for transmit interrupt flag
88  while (!(HWREG8(baseAddress + OFS_UCAxIFG) & UCTXIFG));
89  }
90 
91  HWREG8(baseAddress + OFS_UCAxTXBUF) = transmitData;
92 }
93 
94 uint8_t USCI_A_UART_receiveData (uint16_t baseAddress)
95 {
96  //If interrupts are not used, poll for flags
97  if (!(HWREG8(baseAddress + OFS_UCAxIE) & UCRXIE)){
98  //Poll for receive interrupt flag
99  while (!(HWREG8(baseAddress + OFS_UCAxIFG) & UCRXIFG));
100  }
101 
102  return ( HWREG8(baseAddress + OFS_UCAxRXBUF)) ;
103 }
104 
105 void USCI_A_UART_enableInterrupt (uint16_t baseAddress,
106  uint8_t mask
107  )
108 {
109  uint8_t locMask;
110 
111  locMask = (mask & (USCI_A_UART_RECEIVE_INTERRUPT
112  | USCI_A_UART_TRANSMIT_INTERRUPT));
113  HWREG8(baseAddress + OFS_UCAxIE) |= locMask;
114 
115  locMask = (mask & (USCI_A_UART_RECEIVE_ERRONEOUSCHAR_INTERRUPT
116  | USCI_A_UART_BREAKCHAR_INTERRUPT));
117  HWREG8(baseAddress + OFS_UCAxCTL1) |= locMask;
118 }
119 
120 void USCI_A_UART_disableInterrupt (uint16_t baseAddress,
121  uint8_t mask
122  )
123 {
124  uint8_t locMask;
125 
126  if(locMask = (mask & (USCI_A_UART_RECEIVE_INTERRUPT
127  | USCI_A_UART_TRANSMIT_INTERRUPT))) {
128  HWREG8(baseAddress + OFS_UCAxIE) &= ~locMask;
129  }
130 
131  if(locMask = (mask & (USCI_A_UART_RECEIVE_ERRONEOUSCHAR_INTERRUPT
132  | USCI_A_UART_BREAKCHAR_INTERRUPT))) {
133  HWREG8(baseAddress + OFS_UCAxCTL1) &= ~locMask;
134  }
135 }
136 
137 uint8_t USCI_A_UART_getInterruptStatus (uint16_t baseAddress,
138  uint8_t mask)
139 {
140  return ( HWREG8(baseAddress + OFS_UCAxIFG) & mask );
141 }
142 
143 void USCI_A_UART_clearInterrupt (uint16_t baseAddress, uint8_t mask)
144 {
145  //Clear the UART interrupt source.
146  HWREG8(baseAddress + OFS_UCAxIFG) &= ~(mask);
147 }
148 
149 void USCI_A_UART_enable (uint16_t baseAddress)
150 {
151  //Reset the UCSWRST bit to enable the USCI Module
152  HWREG8(baseAddress + OFS_UCAxCTL1) &= ~(UCSWRST);
153 }
154 
155 void USCI_A_UART_disable (uint16_t baseAddress)
156 {
157  //Set the UCSWRST bit to disable the USCI Module
158  HWREG8(baseAddress + OFS_UCAxCTL1) |= UCSWRST;
159 }
160 
161 uint8_t USCI_A_UART_queryStatusFlags (uint16_t baseAddress,
162  uint8_t mask)
163 {
164  return ( HWREG8(baseAddress + OFS_UCAxSTAT) & mask );
165 }
166 
167 void USCI_A_UART_setDormant (uint16_t baseAddress)
168 {
169  HWREG8(baseAddress + OFS_UCAxCTL1) |= UCDORM;
170 }
171 
172 void USCI_A_UART_resetDormant (uint16_t baseAddress)
173 {
174  HWREG8(baseAddress + OFS_UCAxCTL1) &= ~UCDORM;
175 }
176 
177 void USCI_A_UART_transmitAddress (uint16_t baseAddress,
178  uint8_t transmitAddress)
179 {
180  //Set UCTXADDR bit
181  HWREG8(baseAddress + OFS_UCAxCTL1) |= UCTXADDR;
182 
183  //Place next byte to be sent into the transmit buffer
184  HWREG8(baseAddress + OFS_UCAxTXBUF) = transmitAddress;
185 }
186 
187 void USCI_A_UART_transmitBreak (uint16_t baseAddress)
188 {
189  //Set UCTXADDR bit
190  HWREG8(baseAddress + OFS_UCAxCTL1) |= UCTXBRK;
191 
192  //If current mode is automatic baud-rate detection
193  if (USCI_A_UART_AUTOMATIC_BAUDRATE_DETECTION_MODE ==
194  (HWREG8(baseAddress + OFS_UCAxCTL0) &
195  USCI_A_UART_AUTOMATIC_BAUDRATE_DETECTION_MODE)){
196  HWREG8(baseAddress + OFS_UCAxTXBUF) = USCI_A_UART_AUTOMATICBAUDRATE_SYNC;
197  } else {
198  HWREG8(baseAddress + OFS_UCAxTXBUF) = DEFAULT_SYNC;
199  }
200 
201  //If interrupts are not used, poll for flags
202  if (!(HWREG8(baseAddress + OFS_UCAxIE) & UCTXIE)){
203  //Poll for transmit interrupt flag
204  while (!(HWREG8(baseAddress + OFS_UCAxIFG) & UCTXIFG));
205  }
206 }
207 
208 uint32_t USCI_A_UART_getReceiveBufferAddressForDMA (uint16_t baseAddress)
209 {
210  return ( baseAddress + OFS_UCAxRXBUF );
211 }
212 
213 uint32_t USCI_A_UART_getTransmitBufferAddressForDMA (uint16_t baseAddress)
214 {
215  return ( baseAddress + OFS_UCAxTXBUF );
216 }
217 
218 
219 #endif
220 //*****************************************************************************
221 //
224 //
225 //*****************************************************************************
uint8_t transmitData
MPU_initThreeSegmentsParam param
#define HWREG8(x)
Definition: hw_memmap.h:41
#define HWREG16(x)
Definition: hw_memmap.h:39
#define STATUS_SUCCESS
Definition: hw_memmap.h:22